{"title":"Drain barrier lowering in HEMTs","authors":"R. Anholt","doi":"10.1109/GAAS.1998.722638","DOIUrl":null,"url":null,"abstract":"Drain barrier lowering gives pinchoff voltages that vary as /spl gamma/Vds, which affects the output conductances. The factor /spl gamma/ depends on the channel aspect ratio X=/spl pi/L/4d, where L is the effective gate length and d is the effective channel depth. For low output conductances we need to minimize /spl gamma/ and maximize the channel aspect ratio X. This paper uses 2D simulations to delineate the effective L and d parameters, and illustrates what can be done to the layer design to minimize d.","PeriodicalId":288170,"journal":{"name":"GaAs IC Symposium. IEEE Gallium Arsenide Integrated Circuit Symposium. 20th Annual. Technical Digest 1998 (Cat. No.98CH36260)","volume":"17 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1998-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"GaAs IC Symposium. IEEE Gallium Arsenide Integrated Circuit Symposium. 20th Annual. Technical Digest 1998 (Cat. No.98CH36260)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/GAAS.1998.722638","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
Drain barrier lowering gives pinchoff voltages that vary as /spl gamma/Vds, which affects the output conductances. The factor /spl gamma/ depends on the channel aspect ratio X=/spl pi/L/4d, where L is the effective gate length and d is the effective channel depth. For low output conductances we need to minimize /spl gamma/ and maximize the channel aspect ratio X. This paper uses 2D simulations to delineate the effective L and d parameters, and illustrates what can be done to the layer design to minimize d.