A Novel Architecture of ECC Coprocessor for STT-MRAM Based Smart Card Chip

Jiawang Hu, Shu Xu, Cong Zhang
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Abstract

In order to insure the message security between smart card and reader, a novel architecture of Elliptic Curve Cryptography (ECC) coprocessor for spin-torque transfer magnetic random access memory (STT-MRAM) based smart card chip is presented in this paper. By ingenious simplification of the formula and flexible conversion from affine coordinate to projective coordinate, several efficient algorithms are given from point multiplication operations to finite field computations. An elaborate module called modular arithmetic logical unit (MALU) is presented to effectively perform finite field computations over binary extension field GF($2^{163}$). Simulation and hardware implementation results show that the proposed ECC coprocessor can complete an encryption in only 3.3ms with only 1621 LUTs and 654 slices. The coprocessor is both compact and efficient, thus verify its feasibility and coordination with STT-MRAM in smart card chip.
基于STT-MRAM的智能卡芯片ECC协处理器新架构
为了保证智能卡与读写器之间的信息安全,提出了一种基于自旋转矩传输磁随机存取存储器(STT-MRAM)的智能卡芯片椭圆曲线密码协处理器的新架构。通过对公式的巧妙简化和从仿射坐标到射影坐标的灵活转换,给出了从点乘法运算到有限域计算的几种高效算法。提出了一种称为模算术逻辑单元(MALU)的精细模块,用于对二进制扩展域GF($2^{163}$)进行有效的有限域计算。仿真和硬件实现结果表明,该ECC协处理器仅使用1621个lut和654个切片,在3.3ms内完成一次加密。该协处理器紧凑、高效,验证了其在智能卡芯片中与STT-MRAM的可行性和协调性。
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