A 0.58-pJ/bit 56-Gb/s PAM-4 Optical Receiver Frontend with an Envelope Tracker for Co-Packaged Optics in 40-nm CMOS

Abstract

A 56Gb/s PAM-4 optical receiver frontend with a envelope tracker for co-packaged optics (CPO) in 40-nm CMOS technology is presented. An inverter-based shunt-feedback transimpedance amplifier (TIA) is carefully optimized for low noise and high linearity, and a continuous time linear equalizer (CTLE) is adopted for high frequency boosting. A dB-linear variable gain amplifier (VGA) is adopted to realize decibel-linear gain control. An envelope tracker is used to extract the envelope of the received signal, which provides the control voltage for the automatic gain control loop. Post-layout simulations show that this work achieves a 56Gb/s PAM-4 optical receiver frontend with 0.58pJ/bit in 40-nm CMOS process.