{"title":"A new memory scheduling policy for real time systems","authors":"Ankita Samaddar, Moumita Das, A. Banerjee","doi":"10.1109/ISED.2017.8303916","DOIUrl":null,"url":null,"abstract":"In this paper, we propose a new memory DRAM controller scheduling policy for scheduling tasks in real time systems. Our proposal involves a memory bank aware partitioning strategy to partition the requests across banks based on a cost function on some task parameters to schedule memory requests so that the number of deadline misses get reduced significantly in a real time system. We used the Malardalen Worst Case Execution Time (WCET) benchmark programs as our real time tasks. We generated traces of these benchmark programs by running them on an X86 processor. We have developed an end to end setup from processor to memory and our results have been compared with state of the art DRAM controllers. Experimental results on these benchmark programs show the efficiency of our proposed scheme.","PeriodicalId":147019,"journal":{"name":"2017 7th International Symposium on Embedded Computing and System Design (ISED)","volume":"125 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 7th International Symposium on Embedded Computing and System Design (ISED)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISED.2017.8303916","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
In this paper, we propose a new memory DRAM controller scheduling policy for scheduling tasks in real time systems. Our proposal involves a memory bank aware partitioning strategy to partition the requests across banks based on a cost function on some task parameters to schedule memory requests so that the number of deadline misses get reduced significantly in a real time system. We used the Malardalen Worst Case Execution Time (WCET) benchmark programs as our real time tasks. We generated traces of these benchmark programs by running them on an X86 processor. We have developed an end to end setup from processor to memory and our results have been compared with state of the art DRAM controllers. Experimental results on these benchmark programs show the efficiency of our proposed scheme.