H. Canacsinh, L. Redondo, F. F. Silva, E. Schamiloglu
{"title":"Modeling of a solid-state Marx generator with parasitic capacitances for optimization studies","authors":"H. Canacsinh, L. Redondo, F. F. Silva, E. Schamiloglu","doi":"10.1109/PPC.2011.6191627","DOIUrl":null,"url":null,"abstract":"A state-space model of a bipolar solid-state Marx generator topology, including the influence of parasitic capacitances, is presented and discussed as an instrument to analyze the circuit operation. The modeling aims to assist the design engineer to enhance the circuit operating performance in order to reduce the losses and to aid in the selection of the semiconductor current ratings. Simulation results show that parasitic capacitances between Marx cells to ground can significantly load the solid-state switches and introduce new conditions in the operation of the circuit. These preliminary results show good agreement with experimental ones from a laboratory prototype comprising 4 stages, each assembled with 1200 V IGBTs and diodes, operating with 1000 V dc input voltage and 1 kHz frequency, giving 5 kV and 10 µs output pulses.","PeriodicalId":331835,"journal":{"name":"2011 IEEE Pulsed Power Conference","volume":"72 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 IEEE Pulsed Power Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/PPC.2011.6191627","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
A state-space model of a bipolar solid-state Marx generator topology, including the influence of parasitic capacitances, is presented and discussed as an instrument to analyze the circuit operation. The modeling aims to assist the design engineer to enhance the circuit operating performance in order to reduce the losses and to aid in the selection of the semiconductor current ratings. Simulation results show that parasitic capacitances between Marx cells to ground can significantly load the solid-state switches and introduce new conditions in the operation of the circuit. These preliminary results show good agreement with experimental ones from a laboratory prototype comprising 4 stages, each assembled with 1200 V IGBTs and diodes, operating with 1000 V dc input voltage and 1 kHz frequency, giving 5 kV and 10 µs output pulses.