HFIaaS: A proposed FPGA Infrastructure as a Service framework using High-Level Synthesis

Abstract

This paper presents a framework, called FHIaaS, to provide FPGA Infrastructure as a Service (IaaS) in the cloud. The framework contains two parts, VHDL part, and High-Level Synthesis (HLS) part. The former provides an IaaS including FPGAs and a VHDL synthesis tool. The latter is an HLS tool to convert C programs to VHDL and a VHDL simulator for user-side verification of HLS-driven VHDL codes. Therefore, this framework can provide a service for changing C programs to VHDL codes, simulating the codes, synthesizing the codes, and finally running on FPGAs. In this experimental evaluation, PandA HLS tool is used and CHStone is applied on a VC707 board for workload evaluations. All the applied tests have been done for showing the scalability, the amount of overhead, and the constraints of Virtual Machines (VMs) creations. Furthermore, applied workload for VMs and a Physical Machine (PM) have been compared. The VMs were placed on the same PM to compare them. It has been found that HFIaaS with two VMs was 1.3× better than the PM in total execution time. This study may show that employing this architecture could also be useful for Software as a Service (SaaS). Therefore, considering the proposed architecture, an automatic acceleration system may achieve using HLS tools on a SaaS for full hardware based on FPGA designs.