DR-SNUCA: An energy-scalable dynamically partitioned cache

Anshuman Gupta, J. Sampson, M. Taylor
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引用次数: 3

Abstract

Multicore processors have become ubiquitous across many domains, such as datacenters and smartphones. As the number of processing elements increases within these processors, so does the pressure to share the critical on-chip cache resources, but this must be done energy-efficiently and without sacrificing resource guarantees. We propose a scalable dynamic cache-partitioning scheme, DR-SNUCA, which provides an energy-efficient way to reduce resource interference over caches shared among many processing elements. Our results show that DR-SNUCA reduces system energy consumption by 16.3% compared to associatively partitioned caches, such as DNUCA.
DR-SNUCA:能量可伸缩的动态分区缓存
多核处理器已经在许多领域变得无处不在,比如数据中心和智能手机。随着这些处理器中处理元素数量的增加,共享关键片上缓存资源的压力也在增加,但这必须在不牺牲资源保证的情况下高效地完成。我们提出了一种可扩展的动态缓存分区方案,DR-SNUCA,它提供了一种节能的方式来减少在多个处理元素共享的缓存上的资源干扰。我们的研究结果表明,与关联分区缓存(如DNUCA)相比,DR-SNUCA减少了16.3%的系统能耗。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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