Ultra-thin Si directly on insulator (SDOI) MOSFETs at 20 nm gate length

Abstract

This paper investigates on the scaling capability of nanoscale ultra-thin (UT) silicon directly on insulator (SDOI) single gate (SG) and double-gate (DG) Metal Oxide Semiconductor Field-Effect Transistors (MOSFETs). An experiment is done by numerical modelling for both NMOS and PMOS by using device simulator TCAD Sentaurus. Based on the model, we conduct an investigation on Short Channel Effects (SCEs) like drain induced barrier lowering (DIBL), threshold voltage (Vth) shifting between two devices. Two types (Single and Double gate) enhancement type MOSFET has been studied for nanoscale CMOS digital application.