{"title":"An Agile Automatic Frequency Calibration Technique for PLL","authors":"Xin Ding, Jianhui Wu, Chao Chen","doi":"10.1109/CICTA.2018.8706068","DOIUrl":null,"url":null,"abstract":"An agile automatic frequency calibration (AFC) technique is developed in phase locked loop (PLL) for the bluetooth low energy (BLE) applications. Instead of searching for an optimal tuning curve for 40 target frequencies in BLE, the tuning curve feature extraction (TCFE) technique is adopted to reduce necessary calibration times. Moreover, the initial value of each target frequency is adjusted dynamically according to previous result to accelerate calibration speed. The calibration is conducted foreground, then the optimal tuning curve is selected directly and the output frequency of PLL hops quickly in operation. The whole PLL was designed and fabricated in 0.18 μm CMOS technology. Measurement results show that the time for foreground calibration is about 80 μs and the frequency hops without the switch of tuning curves.","PeriodicalId":186840,"journal":{"name":"2018 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CICTA.2018.8706068","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
An agile automatic frequency calibration (AFC) technique is developed in phase locked loop (PLL) for the bluetooth low energy (BLE) applications. Instead of searching for an optimal tuning curve for 40 target frequencies in BLE, the tuning curve feature extraction (TCFE) technique is adopted to reduce necessary calibration times. Moreover, the initial value of each target frequency is adjusted dynamically according to previous result to accelerate calibration speed. The calibration is conducted foreground, then the optimal tuning curve is selected directly and the output frequency of PLL hops quickly in operation. The whole PLL was designed and fabricated in 0.18 μm CMOS technology. Measurement results show that the time for foreground calibration is about 80 μs and the frequency hops without the switch of tuning curves.