A Simplified Variability-Aware VCM Memristor Model for Efficient Circuit Simulation

V. Ntinas, Dharmik Patel, Yongmin Wang, I. Messaris, V. Rana, S. Menzel, A. Ascoli, R. Tetzlaff
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Abstract

Accurate and computationally cost-efficient models for fabricated memristor devices are essential for the design of future computers and AI-driven sensor-processor systems, especially for the simulation of large-scale circuits and systems. The variability-aware JART memristor model properly captures both the conduction mechanisms and the dynamical behavior of actual Valence Change Mechanism (VCM) memristors. However, the original JART VCM model incorporates an implicit description of the memristor current that constitutes a computationally heavy approach. Here, we aim to simplify the JART VCM model by replacing this implicit description with an explicit mathematical expression, leading to faster simulations and enabling deeper theoretical studies. The improvement achieved using the proposed model goes over x20 in simulation speed for increasing number of VCM devices, allowing for faster simulation of computing-inmemory and memristor-based AI systems.
一种用于高效电路仿真的简化可变感知VCM忆阻器模型
对于未来的计算机和人工智能驱动的传感器处理器系统的设计,特别是对于大规模电路和系统的模拟来说,精确和计算上具有成本效益的模型是必不可少的。可变感知的JART记忆电阻器模型可以很好地捕捉到价变机制(VCM)记忆电阻器的传导机制和动态行为。然而,原始的JART VCM模型包含了对忆阻器电流的隐式描述,这构成了计算量很大的方法。在这里,我们的目标是通过用显式数学表达式取代这种隐式描述来简化JART VCM模型,从而实现更快的模拟和更深入的理论研究。随着VCM设备数量的增加,使用所提出的模型实现的改进速度超过了20倍,从而可以更快地模拟内存计算和基于记忆器的人工智能系统。
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