High Power and High Bandwidth Digital Three-Way Doherty Power Amplifier

Abstract

This paper introduces an enhanced combiner architecture for high power and high bandwidth Three-Way Doherty Power Amplifier. The combiner is mathematical analyzed and two antithetic digital driven Doherty amplifiers are designed. The first one aims for high Back-off efficiency across the target bandwidth while the second one was designed for direct load matching. Both Doherty amplifiers feature a peak power of 61 dBm. The challenges for designing amplifiers with such high peak power are the absorption of the large transistor parasitics and matching the low impedance environment to the load. The proposed combiner architecture features transformer offset lines at all amplifier cores allowing the cancellation of parasitics as well as optimization for broadband performance. The first Doherty amplifier uses a broadband multi-step transformer for load matching and features high Back-off efficiency across the target bandwidth. It achieves a fractional bandwidth of 36.4% and a peak output power of 61dBm with a power ripple less than 1 dB. The combiner of the second Doherty amplifier transforms the low impedance environment to the desired load termination. It is able to meet the design goals across the frequency band and even covers a broad region outside the band. It has a fractional bandwidth of 43.5% and a peak output power of 61dBm with a power ripple less than 1 dB. Both Doherty amplifiers are using 500W GaN HEMT transistors from Wolfspeed. The designs and simulations are done with the corresponding Wolfspeed non-linear model.