Analysis and design of CMOS Doherty power amplifier using voltage combining method

Abstract

A 1.75GHz CMOS Doherty power amplifier (PA) is presented. This Doherty PA uses voltage combining method that is different from the conventional current combining Doherty amplifier based on HBT. The output transformer is employed to combine the output power and realize the load modulation. The proposed CMOS Doherty PA is fabricated in 180nm CMOS process. Simulation results show that the output transformer acts as an impedance inverter and reduces the load impedance of carrier amplifier when the peaking amplifier turns, that meet the load modulation Doherty PA operation. The prototype achieves a maximum output power of +28.6dBm with a peak power-added efficiency (PAE) of 31.6% by using 3.4 V supply voltage. The PAE is kept above 25% over a 6 dB range of output power. It shows clearly the efficiency enhancement at the power back-off point due to the Doherty operation.