Combining memory optimization with mapping of multimedia applications for multi-processors system-on-chip

Abstract

Multiprocessor systems-on-chips (MPSoCs) are defined as one of the main drivers of the industrial semiconductors revolution. They are good candidates for systems and applications such as multimedia. Memory is becoming a key player for significant improvements in these applications (power, performance and area). With the emergence of more embedded multimedia applications in the industry, this issue becomes increasingly vital. The large amount of data manipulated by these applications requires high-capacity calculation and memory. This leads to the need of new optimization and mapping techniques. This paper presents a novel approach for combining memory optimization with mapping of data-driven applications. This approach consists of task graph transformation and its integration to existing mapping algorithms. Some significant improvements are obtained for memory gain, communication load and physical links.