{"title":"On-board satellite switch controller for multi-beam communication satellite","authors":"T. Ono, M. Mori","doi":"10.1109/ICC.1990.117240","DOIUrl":null,"url":null,"abstract":"A compact and highly reliable onboard satellite switch controller (SSC) is proposed for a multibeam communication satellite, the Engineering Test Satellite VI. In order to reduce the size, weight, and power consumption of the SSC and to increase its reliability, a latchup-free high-density (64-kb) memory, a microprocessor, and two types of CMOS/bulk LSIs (8 K gate each) have been developed. Moreover, to realize immunity from cosmic ray-induced soft-error, a modular redundant with adaptive error correction scheme is adopted. As a result, the developed onboard SSC is free from soft-error, and the SSC's survival probability is estimated to be as high as 0.99 for a ten-year mission. The weight and power consumption have been reduced to one fourth and one tenth of those of a conventional system, respectively.<<ETX>>","PeriodicalId":126008,"journal":{"name":"IEEE International Conference on Communications, Including Supercomm Technical Sessions","volume":"22 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1990-04-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE International Conference on Communications, Including Supercomm Technical Sessions","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICC.1990.117240","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
A compact and highly reliable onboard satellite switch controller (SSC) is proposed for a multibeam communication satellite, the Engineering Test Satellite VI. In order to reduce the size, weight, and power consumption of the SSC and to increase its reliability, a latchup-free high-density (64-kb) memory, a microprocessor, and two types of CMOS/bulk LSIs (8 K gate each) have been developed. Moreover, to realize immunity from cosmic ray-induced soft-error, a modular redundant with adaptive error correction scheme is adopted. As a result, the developed onboard SSC is free from soft-error, and the SSC's survival probability is estimated to be as high as 0.99 for a ten-year mission. The weight and power consumption have been reduced to one fourth and one tenth of those of a conventional system, respectively.<>