Design of FIR filter with Fast Adders and Fast Multipliers using RNS Algorithm

Abstract

The primary driving force behind the creation of this work was to provide the design and implementation of a 4-tap, 8-tap, 16-tap, 32-tap, and 64-tap RNS (Residue Number System) based on efficient and excessive-overall performance FIR filter. RNS mathematics is a prized tool for theoretical investigation of the speed limitations of rapid mathematics. Some suggested solutions also include a few addition operations; however, using conventional adders will slow down operation and add to the amount of logic gates. So, to address the aforementioned concerns, Kogge-Stone Adder and Brent Kung Adder are being used to reduce delay and area and enhance performance as a whole. First, the multiplier is created using the RNS methodology. In which the Vedic multiplier's power dissipation is also minimized while the latency is shortened from 70% to 90%. In order to assess the findings, we are also using a simple adder and a simple multiplier. Using the Quartus 9.0 Simulation Tool, the combination of those methods results in a completely new structure with an excessively high speed and a small implementation area for the FIR filter.