C2IM: A Compact Computing-In-Memory Unit of 10 Transistors with Standard 6T SRAM

Abstract

Memory wall has been a major bottleneck that restrains the speed and power consumption of processors in the Von Neumann architecture. Computing-in-memory (CIM) was proposed as a promising method to tackle the memory wall by implementing computing in memory instead of fetching the value from memory to the processor. Based on the standard 6T -SRAM, this paper proposes a compact CIM (C2IM) unit of 10 transistors. This C2imunit is capable to not only implement the complete function of SRAM, but also realize the multiplication between the input, which is copied into the unit through the current mirror, and the value stored in the SRAM. Current-mode circuits are adopted in this unit so that it can implement higher energy efficient multiply-accumulate (MAC) operation with simpler control timing and transistor cost. Based on TSMC 65nm CMOS lower power process, the proposed unit can achieve 166.67 TOPS/W energy efficiency under 200MHz clock frequency.