MARTINI: Memory Access Traces to Detect Attacks

Yujun Qin, Samuel Gonzalez, K. Angstadt, Xiaowei Wang, S. Forrest, R. Das, Kevin Leach, Westley Weimer
{"title":"MARTINI: Memory Access Traces to Detect Attacks","authors":"Yujun Qin, Samuel Gonzalez, K. Angstadt, Xiaowei Wang, S. Forrest, R. Das, Kevin Leach, Westley Weimer","doi":"10.1145/3411495.3421353","DOIUrl":null,"url":null,"abstract":"Hardware architectural vulnerabilities, such as Spectre and Meltdown, are difficult or inefficient to mitigate in software. Although revised hardware designs may address some architectural vulnerabilities going forward, most current remedies increase execution time significantly. Techniques are needed to rapidly and efficiently detect these and other emerging threats. We present an anomaly detector, MARTINI, that analyzes traces of memory accesses in real time to detect attacks. Our experimental evaluation shows that anomalies in these traces are strongly correlated with unauthorized program execution, including architectural side-channel attacks of multiple types. MARTINI consists of a finite automaton that models normal program behavior in terms of memory addresses that are read from, and written to, at runtime. The model uses a compact representation of n-grams, i.e., short sequences of memory accesses, which can be stored and processed efficiently. Once the system is trained on authorized behavior, it rapidly detects a variety of low-level anomalous behaviors and attacks not otherwise easily discernible at the software level. MARTINI's implementation leverages recent advances in in-cache and in-memory automata for computation, and we present a hardware unit that repurposes a small portion of a last-level cache slice to monitor memory addresses. Our detector directly inspects the addresses of memory accesses, using the pre-constructed automaton to identify anomalies with high accuracy, negligible runtime overhead, and trivial increase in CPU chip area. We present analyses of expected hardware properties based on indicative cache and memory hierarchy simulations and empirical evaluations.","PeriodicalId":125943,"journal":{"name":"Proceedings of the 2020 ACM SIGSAC Conference on Cloud Computing Security Workshop","volume":"142 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-11-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 2020 ACM SIGSAC Conference on Cloud Computing Security Workshop","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/3411495.3421353","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 8

Abstract

Hardware architectural vulnerabilities, such as Spectre and Meltdown, are difficult or inefficient to mitigate in software. Although revised hardware designs may address some architectural vulnerabilities going forward, most current remedies increase execution time significantly. Techniques are needed to rapidly and efficiently detect these and other emerging threats. We present an anomaly detector, MARTINI, that analyzes traces of memory accesses in real time to detect attacks. Our experimental evaluation shows that anomalies in these traces are strongly correlated with unauthorized program execution, including architectural side-channel attacks of multiple types. MARTINI consists of a finite automaton that models normal program behavior in terms of memory addresses that are read from, and written to, at runtime. The model uses a compact representation of n-grams, i.e., short sequences of memory accesses, which can be stored and processed efficiently. Once the system is trained on authorized behavior, it rapidly detects a variety of low-level anomalous behaviors and attacks not otherwise easily discernible at the software level. MARTINI's implementation leverages recent advances in in-cache and in-memory automata for computation, and we present a hardware unit that repurposes a small portion of a last-level cache slice to monitor memory addresses. Our detector directly inspects the addresses of memory accesses, using the pre-constructed automaton to identify anomalies with high accuracy, negligible runtime overhead, and trivial increase in CPU chip area. We present analyses of expected hardware properties based on indicative cache and memory hierarchy simulations and empirical evaluations.
内存访问跟踪来检测攻击
硬件架构漏洞,如Spectre和Meltdown,很难或低效地在软件中缓解。尽管修改后的硬件设计可能会解决未来的一些体系结构漏洞,但大多数当前补救措施都会显著增加执行时间。需要技术来快速有效地检测这些和其他新出现的威胁。我们提出了一个异常检测器MARTINI,它可以实时分析内存访问的痕迹以检测攻击。我们的实验评估表明,这些痕迹中的异常与未经授权的程序执行密切相关,包括多种类型的架构侧通道攻击。MARTINI由一个有限自动机组成,该自动机根据运行时读取和写入的内存地址来模拟正常的程序行为。该模型使用n-gram的紧凑表示,即存储器访问的短序列,可以有效地存储和处理。一旦系统接受了授权行为的训练,它就会迅速检测到各种低级别的异常行为和攻击,否则在软件级别上很难识别。MARTINI的实现利用了缓存内和内存自动机的最新进展进行计算,我们提出了一个硬件单元,它可以重新利用最后一级缓存片的一小部分来监视内存地址。我们的检测器直接检查内存访问地址,使用预先构建的自动机识别异常,具有高精度,可忽略不计的运行时开销,以及CPU芯片面积的微小增加。我们提出了基于指示性缓存和内存层次模拟和经验评估的预期硬件特性分析。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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