Memory efficient list based Hough transform for programmable digital signal processors with on-chip caches

Abstract

A memory efficient implementation of the generalized Hough transform for line detection is presented. By using list based processing instead of a direct transform into Hough space and histogramming as the final evaluation step, a reduction of the required memory size by a factor greater than 5 is achieved for standard image parameters. Because the accessed data structures are fairly small and a high spatial locality is achieved, the implementation is especially suited for DSPs with on-chip caches. The scalar and parallel implementation of the list based transform is shown and performance results based on simulations are presented.