Implementation of Logic Gates using Charge Plasma Based Tunnel FET

Abstract

For digital applications, researchers are looking into tunnel field-effect transistors (TFETs) as a possible substitute for MOSFETs. TFETs offer several unique qualities that can be used in digital applications. Utilizing two-dimensional device simulations, a single DGTFET is presented in this paper to implement various logic functions. It is demonstrated that by biasing the two gates individually, DGTFET can be used to implement logic operations like OR and AND. Using the overlap of gate-source region (Lov) and opting the optimum silicon wafer thickness are crucial to getting distinct logic functions from a DGTFET. These applications show that it is possible to compactly create logic functions by taking advantage of the special TFET characteristics namely, ambipolar nature and tunneling’s dependence on gate controlling capability over channel region.