Design rule centring for row redundant content addressable memories

Proceedings 1992 IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems Pub Date : 1992-11-04 DOI:10.1109/DFTVS.1992.224353

W.B. Noghani, I. Jalowiecki

引用次数: 1

Abstract

A yield model is developed to estimate yield values for an associative processing chip based largely on content addressable memory (CAM). The yield model combines analysis of a row redundant strategy for the CAM with a relaxation of design rules to minimise column defects.<>

查看原文本刊更多论文

为行冗余内容可寻址存储器设计规则中心

建立了一种基于内容可寻址存储器(CAM)的联想处理芯片成品率模型。屈服模型结合了CAM的行冗余策略分析和设计规则的放松，以尽量减少柱缺陷

本文章由计算机程序翻译，如有差异，请以英文原文为准。

求助全文

约1分钟内获得全文求助全文

来源期刊

Proceedings 1992 IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems

自引率

0.00%

发文量