David N. Abramson, J. Gray, Shyam Subramanian, P. Hasler
{"title":"A field-programmable analog array using translinear elements","authors":"David N. Abramson, J. Gray, Shyam Subramanian, P. Hasler","doi":"10.1109/IWSOC.2005.8","DOIUrl":null,"url":null,"abstract":"A field programmable analog array that uses translinear elements for computation is introduced. The system uses floating-gate transistors to implement switch networks and MITEs to create reconfigurable translinear networks. The system architecture includes 3 MITE CABs, 1 specialized CAB for implementing four quadrant and dynamic functions, and a global switch matrix used to connect them. A squaring circuit, a square root circuit, a 2nd-order translinear loop, a vector magnitude circuit, and a 1st-order log-domain filter are programmed onto the device and results are presented in order to demonstrate the reconfigurability of the system.","PeriodicalId":328550,"journal":{"name":"Fifth International Workshop on System-on-Chip for Real-Time Applications (IWSOC'05)","volume":"5 3","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2005-07-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"19","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Fifth International Workshop on System-on-Chip for Real-Time Applications (IWSOC'05)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IWSOC.2005.8","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 19
Abstract
A field programmable analog array that uses translinear elements for computation is introduced. The system uses floating-gate transistors to implement switch networks and MITEs to create reconfigurable translinear networks. The system architecture includes 3 MITE CABs, 1 specialized CAB for implementing four quadrant and dynamic functions, and a global switch matrix used to connect them. A squaring circuit, a square root circuit, a 2nd-order translinear loop, a vector magnitude circuit, and a 1st-order log-domain filter are programmed onto the device and results are presented in order to demonstrate the reconfigurability of the system.