D. Lee, B. Lee, I.S. Jung, T. Kim, Y. Son, Sun-Ghil Lee, Young-pil Kim, Siyoung Choi, U. Chung, J. Moon
{"title":"Fin-channel-array transistor (FCAT) featuring sub-70nm low power and high performance DRAM","authors":"D. Lee, B. Lee, I.S. Jung, T. Kim, Y. Son, Sun-Ghil Lee, Young-pil Kim, Siyoung Choi, U. Chung, J. Moon","doi":"10.1109/IEDM.2003.1269309","DOIUrl":null,"url":null,"abstract":"For the first time, a highly manufacturable fin-channel array transistor (FCAT) on a bulk Si substrate has been successfully integrated in a 512 M density DRAM with sub-70nm technology. The FCAT shows an excellent short channel behavior, such as extremely low subthreshold swing (SS) (/spl sim/75mV/dec) and DIBL (/spl sim/13mV/V), and a high cell transistor drive current with remarkably low subthreshold leakage current (/spl sim/0.2fA/cell).","PeriodicalId":344286,"journal":{"name":"IEEE International Electron Devices Meeting 2003","volume":"5 4","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2003-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE International Electron Devices Meeting 2003","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEDM.2003.1269309","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 10
Abstract
For the first time, a highly manufacturable fin-channel array transistor (FCAT) on a bulk Si substrate has been successfully integrated in a 512 M density DRAM with sub-70nm technology. The FCAT shows an excellent short channel behavior, such as extremely low subthreshold swing (SS) (/spl sim/75mV/dec) and DIBL (/spl sim/13mV/V), and a high cell transistor drive current with remarkably low subthreshold leakage current (/spl sim/0.2fA/cell).