Constantinos Stefanatos, I. Papaefstathiou, C. Manifavas
{"title":"Development and implementation of a Network Processor Architecture in reconfigurable logic (FPGA)","authors":"Constantinos Stefanatos, I. Papaefstathiou, C. Manifavas","doi":"10.1109/WISES.2010.5548436","DOIUrl":null,"url":null,"abstract":"Network Processors are used at the core of the Internet, providing routers, switches and other essential network devices with the necessary processing power to deliver proper data forwarding and other network related functions (VoIP, security, etc.) at the required level of performance. In this paper, we present a Network Processor architecture, designed to support all the fundamental instructions needed to deliver proper frame processing. It is designed and implemented on a specific FPGA board, employing Xilinx's Virtex-5, in order to allow for rapid deployment and usage. Apart from the architecture's description, performance measurements are provided that demonstrate the architecture's capabilities.","PeriodicalId":166416,"journal":{"name":"2010 8th Workshop on Intelligent Solutions in Embedded Systems","volume":"14 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-07-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 8th Workshop on Intelligent Solutions in Embedded Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/WISES.2010.5548436","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
Network Processors are used at the core of the Internet, providing routers, switches and other essential network devices with the necessary processing power to deliver proper data forwarding and other network related functions (VoIP, security, etc.) at the required level of performance. In this paper, we present a Network Processor architecture, designed to support all the fundamental instructions needed to deliver proper frame processing. It is designed and implemented on a specific FPGA board, employing Xilinx's Virtex-5, in order to allow for rapid deployment and usage. Apart from the architecture's description, performance measurements are provided that demonstrate the architecture's capabilities.