A Low-Jitter Technique of Frequency Multiplication Using Quartz Crystal Array

Zhiqiang Zhou, Yuan Liu, Shaoshuang Su, Xiaojiang Liang, Ping Wang
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Abstract

A novel technique for frequency multiplication provides higher frequency clock output by using the crystal delay array made from the low-frequency crystal filters. This paper presents the analysis and design in both crystal array arrangement and circuit level of such systems. The low-jitter and high frequency stability characteristics, low cost and small size features will be also discussed with comparing current crystal oscillators. The simulation and prototyping results will be given. The presented technique is extendable to other types of resonator devices such as saw and mems based filter array to generate even higher clock frequency.
基于石英晶体阵列的低抖动倍频技术
利用低频晶体滤波器制成的晶体延迟阵列,实现了一种新的频率倍增技术,提供了更高频率的时钟输出。本文从晶体排列和电路层面对该系统进行了分析和设计。通过对现有晶体振荡器的比较,讨论了低抖动和高频稳定特性、低成本和小尺寸的特点。将给出仿真和原型设计结果。该技术可扩展到其他类型的谐振器器件,如saw和基于mems的滤波器阵列,以产生更高的时钟频率。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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