{"title":"SOPC for real time multi-video treatments with QoS requirements","authors":"L. Kechiche, L. Touil, B. Ouni","doi":"10.1109/ICEMIS.2017.8273096","DOIUrl":null,"url":null,"abstract":"Embedded-system designers are focusing today on multimedia applications with an almost insatiable demand for low-cost and high performance. Generally, the majority of video applications need to execute parallel tasks with simultaneous access to the memory. In fact, these parallel tasks have different bandwidth requirements that have to be satisfied separately when granting access to the memory. In this paper, a general purpose architecture for video applications is proposed. This architecture satisfies the parallel access to the memory with different bandwidth requirements. The suggested solution is based on a multi port memory controller with the bandwidth guarantee priority access as an arbitration algorithm to guarantee QoS requirements. We demonstrate the important role of this solution in multi-video applications when multiple bandwidths are required. The proposed architecture is implemented using the Xilinx Virtex-5 FPGA.","PeriodicalId":117908,"journal":{"name":"2017 International Conference on Engineering & MIS (ICEMIS)","volume":" 39","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 International Conference on Engineering & MIS (ICEMIS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICEMIS.2017.8273096","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
Embedded-system designers are focusing today on multimedia applications with an almost insatiable demand for low-cost and high performance. Generally, the majority of video applications need to execute parallel tasks with simultaneous access to the memory. In fact, these parallel tasks have different bandwidth requirements that have to be satisfied separately when granting access to the memory. In this paper, a general purpose architecture for video applications is proposed. This architecture satisfies the parallel access to the memory with different bandwidth requirements. The suggested solution is based on a multi port memory controller with the bandwidth guarantee priority access as an arbitration algorithm to guarantee QoS requirements. We demonstrate the important role of this solution in multi-video applications when multiple bandwidths are required. The proposed architecture is implemented using the Xilinx Virtex-5 FPGA.