FPGA Implementations of Cube Neutral Key Bits Analysis on Block Cipher EPCBC

Abstract

This paper aims to present cube neutral bit tester on EPCBC. Cube neutral bit tester is a generic class of methods for building distinguishers, which find function approximating F(K, V) that depend on less than all key bits. We demonstrate how to use an efficient FPGA implementation cube neutral bit tester on the block cipher EPCBC. Different from the previous kinds of attack, the primary purpose of our study is to detect whether a single key bit ki influences the output of F or not. Our experiment showed that reduced to 8-round for EPCBC-48 and 8-round for EPCBC-96 output cumulative bits involve in all bits information of master key, there is no neutral key bits. The results indicate that the full-round EPCBC is steady for key information diffusivity and confusion to resist the classic cube attack.