{"title":"FPGA and ARM processor based supercomputing","authors":"W. Akram, Tassadaq Hussain, E. Ayguadé","doi":"10.1109/ICOMET.2018.8346363","DOIUrl":null,"url":null,"abstract":"The low-cost and low-power heterogeneous architecture platform such as Xilinx Zynq SoC provides an extensive combination of ARM multi-core processor with FPGA accelerator for acceleration of high performance computing applications. In this paper, we proposed an FPGA and ARM processor based supercomputer system composed of five Zynq SoCs compute-nodes. The design system uses message passing interface libraries for communication between compute-nodes while AXI4-stream interfaces between ARM processor and FPGA inside a compute-node. An FIR filter application is used to test the performance of the system with and without FPGA accelerators. The results show that the performance of ARM based supercomputer with FPGA accelerators is 8.56 times higher than similar system without FPGA accelerators.","PeriodicalId":381362,"journal":{"name":"2018 International Conference on Computing, Mathematics and Engineering Technologies (iCoMET)","volume":"44 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-03-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 International Conference on Computing, Mathematics and Engineering Technologies (iCoMET)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICOMET.2018.8346363","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
The low-cost and low-power heterogeneous architecture platform such as Xilinx Zynq SoC provides an extensive combination of ARM multi-core processor with FPGA accelerator for acceleration of high performance computing applications. In this paper, we proposed an FPGA and ARM processor based supercomputer system composed of five Zynq SoCs compute-nodes. The design system uses message passing interface libraries for communication between compute-nodes while AXI4-stream interfaces between ARM processor and FPGA inside a compute-node. An FIR filter application is used to test the performance of the system with and without FPGA accelerators. The results show that the performance of ARM based supercomputer with FPGA accelerators is 8.56 times higher than similar system without FPGA accelerators.