Effects of carrier phase and chip timing errors on the capacity of a quadriphase spread BPSK modulated DS-CDMA system

Abstract

Efficient series that are used to calculate the probability of error for quadriphase spread, BPSK modulated, synchronous, quasi-synchronous and asynchronous DS-CDMA systems in the presence of chip timing and carrier phase errors are derived. The derivations require the characteristic functions of the multiple access interference and of the self interference. These series are then used to assess the capacity of the systems at different levels of synchronization errors. The derivations are performed for both constant and random synchronization errors. Using the series, the asynchronous quadriphase spread system capacity is compared to that of an asynchronous binary spread system.