D. Lambert, J. Rahn, M. Sodagar, M. Askari, P. Apiratikul, J. Spann, Thang Pham, Yishen Huang, S. Krasulick
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引用次数: 0
Abstract
We present a low-cost, scalable 3.2Tbps heterogenous photonic integrated circuit chip assembled in a co-packaged optics configuration. The integration of III-V material directly into the Silicon-Photonic chip offers clear form-factor, density, and thermal dissipation advantages.