Development of efficient VLSI architecture for speech processing in mobile communication

Abstract

Design of Specific architecture for a given application is very much necessary to solve the present day complex problems. Low cost VLSI architectures are used to deal with these efforts. Since mobiles phones for used worldwide in large numbers, developing dedicated hardware on high volume products like these will benefit VLSI economically. Some VLSI approaches are economically feasible in architectural synthesis of digital signal processing systems. These approaches are very essential in low volume to medium volume DSP applications. Speech Processing is one of the complex DSP procedures in mobile phone since it involves; speech recognition, noise suppression, silence detection, pitch analysis and may more. VLSI programmable technologies, such as FPGA, which is recommended for low price VLSI, is used widely in market. In this paper we have developed one such application specific architecture for suppressing surrounding noise in the mobile communication.