Low reverse transfer capacitance VDMOS transistor

Abstract

A VDMOS (vertical double-diffused metal-oxide semiconductor) transistor structure is proposed that reduces reverse transfer capacitance. The structure features an additional p-region formed at the surface of the n-epitaxial layer, using a poly-Si gate as a mask. Its measured reverse transfer capacitance is about 50% less than that of the conventional VDMOS, and the rise time reduced 50%. measured I/sub D/-V/sub DS/, drain-source breakdown, and switching characteristics are also presented.<>