A 180nm fully-integrated dual-channel reconfigurable receiver for GNSS interoperations

2013 Proceedings of the ESSCIRC (ESSCIRC) Pub Date : 2013-10-31 DOI:10.1109/ESSCIRC.2013.6649101

Nan Qi, B. Chi, Yang Xu, Zhou Chen, Yang Xu, Jun Xie, Zheng Song, Zhihua Wang

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引用次数: 5

Abstract

A fully-integrated dual-channel reconfigurable GNSS (GPS/GLONASS/Galileo/Compass) receiver in 180nm CMOS is presented, supporting simultaneous dual-system signal reception. Two channels of the receiver share RF front-end circuits and the frequency synthesizer, and employ separate IF-strips to support the different navigation systems. Reconfigurable signal bandwidths are supported, covering from 2.2MHz to 10MHz to implement both civil and high precision positioning. The on-chip I/Q mismatch calibration circuit is integrated to improve the image rejection ratio (IRR), which can be realized automatically with the aid of a FPGA. Besides, the receiver integrates internal AFC, DCOC, LDO and DCXO, which make it a complete GNSS radio. Thanks to the power scalable analog baseband circuits, the power consumption in the typical dual-channel mode is reduced to 23mA. The receiver achieves 2.5dB noise figure, 55dB dynamic range with 1dB steps, 50dB IRR and -57dBm input 1dB-compression point. The receiver can cooperate with a digital baseband to track real-time satellites in the open sky, achieving higher than 40dB CNR for both GPS and Compass systems.

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用于GNSS互操作的180nm全集成双通道可重构接收机

提出了一种180nm CMOS全集成双通道可重构GNSS (GPS/GLONASS/Galileo/Compass)接收机，支持双系统信号同时接收。接收机的两个通道共用射频前端电路和频率合成器，并采用单独的中频带来支持不同的导航系统。支持可重构的信号带宽，覆盖2.2MHz至10MHz，可实现民用和高精度定位。为了提高图像抑制比(IRR)，集成了片上I/Q错配校正电路，可借助FPGA自动实现。此外，接收机内部集成了AFC、DCOC、LDO和DCXO，使其成为一个完整的GNSS无线电。由于采用功率可扩展的模拟基带电路，典型双通道模式下的功耗降至23mA。接收机的噪声系数为2.5dB，动态范围为55dB，步进为1dB, IRR为50dB，输入为-57dBm，压缩点为1dB。该接收机可以配合数字基带在开放天空中跟踪实时卫星，GPS和Compass系统的信噪比均高于40dB。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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2013 Proceedings of the ESSCIRC (ESSCIRC)

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