{"title":"Switched-capacitor DC-DC converters for low-power on-chip applications","authors":"Dragan Maksimovic, S. Dhar","doi":"10.1109/PESC.1999.788980","DOIUrl":null,"url":null,"abstract":"The paper describes switched-capacitor DC-DC power converters (charge pumps) suitable for on-chip, low-power applications. The proposed configurations are based on connecting two identical but opposite-phase SC converters in parallel, thus eliminating the need for separate bootstrap gate drivers. The authors focus on emerging very low-power VLSI applications such as battery-powered or self-powered signal processors where high power conversion efficiency is important and where power levels are in the milliwatt range. Conduction and switching losses are considered to allow design optimization in terms of switching frequency and component sizes. Open-loop and closed-loop operation of an experimental, fully integrated, 10 MHz voltage doubler is described. The doubler has 2 V or 3 V input and generates 3.3 V or 5 V output at up to 5 mW load. The converter circuit fabricated in a standard 1.2 /spl mu/ CMOS technology takes 0.7 mm/sup 2/ of the chip area.","PeriodicalId":292317,"journal":{"name":"30th Annual IEEE Power Electronics Specialists Conference. Record. (Cat. No.99CH36321)","volume":" 38","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1999-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"177","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"30th Annual IEEE Power Electronics Specialists Conference. Record. (Cat. No.99CH36321)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/PESC.1999.788980","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 177
Abstract
The paper describes switched-capacitor DC-DC power converters (charge pumps) suitable for on-chip, low-power applications. The proposed configurations are based on connecting two identical but opposite-phase SC converters in parallel, thus eliminating the need for separate bootstrap gate drivers. The authors focus on emerging very low-power VLSI applications such as battery-powered or self-powered signal processors where high power conversion efficiency is important and where power levels are in the milliwatt range. Conduction and switching losses are considered to allow design optimization in terms of switching frequency and component sizes. Open-loop and closed-loop operation of an experimental, fully integrated, 10 MHz voltage doubler is described. The doubler has 2 V or 3 V input and generates 3.3 V or 5 V output at up to 5 mW load. The converter circuit fabricated in a standard 1.2 /spl mu/ CMOS technology takes 0.7 mm/sup 2/ of the chip area.