Dual Material Gate Silicon on Insulator (DMGSOI) - Design impact on linearity

Abstract

This paper presents the impact of implementing Dual Material Gate (DMG) onto a fully depleted Silicon On Insulator (SOI) device on linearity performance as compare to the standard Single Material Gate (SMG) SOI device. Linearity study performed takes into account the influences of DMG properties namely gate length ratio (L1:L2) and gate workfunction difference (ΔΦM), silicon thickness (TSi) and threshold voltage (VTH) setting simulated using ATLAS 2D. Analysis focus on gate bias condition which determine the saturation level, relevant for obtaining minimal linearity degradation. Based on results obtained, DMG device consistently show better linearity performance than its SMG counterparts with further improvement by applying higher ΔΦM and TSi.