Rupesh S. Shelar, Sacheendra Nath, Jagmohan S. Nanaware
{"title":"Parameterized reusable component library methodology","authors":"Rupesh S. Shelar, Sacheendra Nath, Jagmohan S. Nanaware","doi":"10.1109/EURMIC.2000.874660","DOIUrl":null,"url":null,"abstract":"The authors describe the Parameterized Reusable Component Library (PRCLIB) methodology, which supports design reuse automation. Unlike the Y-chart approach (A.C.J. Kienhuis, 1998) which helps design space exploration at higher levels of abstraction, PRCLIB methodology addresses the issue of design space exploration at RTL levels. Although the methodology is developed keeping in mind Data Driven Media Processor (DDMP), the methodology is applicable to general purpose processors as well. In PRCLIB methodology, we also support parameterized test pattern generation, intellectual property (IP) reuse, automatic RTL code generation. Finally, we compare the scope of our tool with a similar tool, Hyper (O. Bentz).","PeriodicalId":138250,"journal":{"name":"Proceedings of the 26th Euromicro Conference. EUROMICRO 2000. Informatics: Inventing the Future","volume":"48 9","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-09-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 26th Euromicro Conference. EUROMICRO 2000. Informatics: Inventing the Future","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EURMIC.2000.874660","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 6
Abstract
The authors describe the Parameterized Reusable Component Library (PRCLIB) methodology, which supports design reuse automation. Unlike the Y-chart approach (A.C.J. Kienhuis, 1998) which helps design space exploration at higher levels of abstraction, PRCLIB methodology addresses the issue of design space exploration at RTL levels. Although the methodology is developed keeping in mind Data Driven Media Processor (DDMP), the methodology is applicable to general purpose processors as well. In PRCLIB methodology, we also support parameterized test pattern generation, intellectual property (IP) reuse, automatic RTL code generation. Finally, we compare the scope of our tool with a similar tool, Hyper (O. Bentz).