2009 IEEE International SOI Conference

Physical IP design for advanced SOI technologies

Pub Date : 2009-11-06 DOI: 10.1109/SOI.2009.5318763 Y. Laplanche, J. Pelloie, C. Frey, Mikael Rien

Ultra-low-power high-noise-margin logic with undoped FD SOI devices

Pub Date : 2009-11-06 DOI: 10.1109/SOI.2009.5318760 D. Bol, J. De Vos, D. Flandre, J. Legat

Fabrication of compressively-strained GeOI substrates using the Smart CutTM technology

Pub Date : 2009-11-06 DOI: 10.1109/SOI.2009.5318768 E. Augendre, L. Sanchez, J. Hartmann, W. Van Den Daele, S. Favier, E. Guiot, B. Ghyselen, K. Bourdelle, S. Cristoloveanu, T. Billon, L. Clavelier