2018 IEEE Symposium in Low-Power and High-Speed Chips (COOL CHIPS)

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2018 IEEE Symposium in Low-Power and High-Speed Chips (COOL CHIPS) - 最新文献

Data selection and de-noising based on reliability for long-range and high-pixel resolution LiDAR

Pub Date : 2018-04-18 DOI: 10.1109/CoolChips.2018.8373079 Ken Tanabe, H. Kubota, A. Sai, Nobu Matsumoto

3D-cool: Design and development of adaptive thermal-aware three-dimensional NoC-based multiprocessor chip

Pub Date : 2018-04-18 DOI: 10.1109/CoolChips.2018.8373074 V. Pangracious, Ranjitha Dash, A. K. Turuk

A two-stage-pipeline CPU of SH-2 architecture implemented on FPGA and SoC for IoT, edge AI and robotic applications

Pub Date : 2018-04-18 DOI: 10.1109/CoolChips.2018.8373084 K. Hagiwara, Tomoichi Hayashi, S. Kawasaki, F. Arakawa, Oleg Endo, Hayato Nomura, Akira Tsukamoto, Duong Nguyen, Binh Nguyen, Anh Tran, Hoan Hyunh, I. Kudoh, C. Pham

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