Built-in Self-Test Circuits for All-digital Phase-Locked Loops

已取消 10 由七七发布于 2026/2/5 15:34:08

DOI:10.1109/icce-tw46550.2019.8991928
文献类型：期刊论文
补充材料：只需要正文
文献链接：https://doi.org/10.1109/ICCE-TW46550.2019.8991928

Institute of Electrical and Electronics Engineers (IEEE)

Abstract：This paper presents the design of an all-digital built-in self-test (BIST) circuit for all-digital phase-locked loops (ADPLLs). It measures clock jitter of the ADPLL and tests the PLL functi

应助信息

8小时前

Book学术机器人

2026/2/5 15:34:08 未找到该文献，机器人已退出，请等待人工下载

2026/2/5 15:34:08 Book学术AI机器人收到请求，开始寻找文献

2026/2/5 15:34:08 已向机器人发送请求

8小时前

七七发布求助

上一个求助:其它数据库Naturally Fractured Carbonate Reservoir Characterization: A Case Study of a Mature High-Pour Point Oil Field in Hungary 下一个求助:SageResearch Progress of Cyclooxygenase-2 in Colorectal Adenomas.