单芯片通用突发接收器,用于电缆调制解调器/数字有线电视应用

F. Lu, J. Min, Sam Liu, K. Cameron, Christopher Jones, O. Lee, Johnson Li, A. Buchwald, S. Jantzi, C. Ward, K. Choi, Jim Searle, H. Samueli
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引用次数: 3

摘要

本文提出了一种基于频率捷变时分多址(TDMA)方案解调QPSK/16-QAM突发数据的单片电缆上行接收机。模拟前端(AFE)、全数字接收机和FEC解码器集成在芯片上。AFE在中频输入或基带I/Q输入上执行粗增益设置和信号量化。数字QAM接收机包含一个正交下混频器、多级抽取器、奈奎斯特滤波器、载波/定时采集环路和一个自适应均衡器。FEC解码器由一个可编程解码器和一个通用里德-所罗门解码器组成。该芯片在0.35-/spl mu/m CMOS工艺中占用4.7/spl次/7.8 mm/sup / 2/芯片面积,在100引脚PQFP中在3.3 V下消耗1.0 W。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A single-chip universal burst receiver for cable modem/digital cable-TV applications
This paper presents a single-chip cable upstream receiver which demodulates QPSK/16-QAM burst data in a frequency-agile, time-division multiple access (TDMA) scheme. An analog front end (AFE), an all-digital receiver and an FEC decoder are integrated on chip. The AFE performs coarse gain setting and signal quantization on either an IF input or baseband I/Q inputs. The digital QAM receiver contains a quadrature down-mixer, multi-stage decimators, Nyquist filters, carrier/timing acquisition loops, and an adaptive equalizer. The FEC decoder consists of a programmable descrambler and a versatile Reed-Solomon decoder. The chip occupies 4.7/spl times/7.8 mm/sup 2/ die area in a 0.35-/spl mu/m CMOS process, and consumes 1.0 W at 3.3 V in a 100-pin PQFP.
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