用于雷达应用的高集成低功耗60 GHz多通道收发器

V. Issakov, R. Ciocoveanu, R. Weigel, A. Geiselbrechtinger, J. Rimmelspacher
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引用次数: 10

摘要

我们提出了一种高集成度、低功耗的60 GHz多通道收发器,采用28纳米体CMOS技术实现。该电路集成了三个接收(RX)通道和两个发送(TX)通道。接收通道包括LNA、无源混频器和跨阻放大器(TIA),而发送通道包含三级变压器耦合差分功率放大器(PA)。此外,收发器集成了一个本地振荡器(LO)信号生成网络,包括压控振荡器(VCO)、LO缓冲器、功率分离器、分频器和无源配电网络。该压控振荡器采用推推交叉耦合拓扑结构,可在57- 72 GHz频率范围内连续调谐,同时在60 GHz频率下,在1 MHz偏置时测量相位噪声为- 84 dBc/Hz。整个收发器使用单个0.9 V电源消耗342 mW。单个RX通道消耗33 mA,而单个TX消耗43 mA。包含焊盘的电路占用的芯片面积仅为1.9 mm × 2.5 mm,仅受通道之间隔离所需的分离的限制。该收发器提供具有竞争力的性能,适用于60 GHz连续波雷达应用。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Highly-Integrated Low-Power 60 GHz Multichannel Transceiver for Radar Applications in 28 nm CMOS
We present a highly-integrated low-power 60 GHz multi-channel transceiver realized in a 28 nm bulk CMOS technology. The circuit integrates three receive (RX) and two transmit (TX) channels. A receive channel includes an LNA, a passive mixer and a transimpedance amplifier (TIA), while a transmit channel contains a three-stage transformer-coupled differential power amplifier (PA). Additionally, the transceiver integrates a local oscillator (LO) signal generation network comprising a voltage-controlled oscillator (VCO), LO buffers, power splitters, frequency divider and a passive distribution network. The VCO is realized as a push-push cross-coupled topology and is continuously tunable in the frequency range 57-to-72 GHz, while achieving a measured phase noise of −84 dBc/Hz at 1 MHz offset at 60 GHz. The entire transceiver dissipates 342 mW using a single 0.9 V supply. A single RX channel draws 33 mA, while a single TX consumes 43 mA. The circuit including pads occupies a chip area of only 1.9 mm × 2.5 mm, which is limited only by the separation necessary for isolation between the channels. The transceiver provides a competitive performance and is suitable for 60 GHz continuous-wave radar applications.
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