具有自校准14位线性的CMOS 4位MDAC,用于高分辨率流水线A/D转换器

Joao Goes, J. Vital, Jose E. Franca
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引用次数: 12

摘要

本文提出了一种用于高速高分辨率流水线adc的集成4位MDAC,它采用逐码模拟自校准技术。在1.0 /spl mu/m CMOS技术中制作的原型的测量结果表明,所提出的自校准技术将MDAC线性度和级间增益校正到14位水平,同时允许转换速率在MHz范围内。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A CMOS 4-bit MDAC with self-calibrated 14-bit linearity for high-resolution pipelined A/D converters
This paper presents an integrated 4-bit MDAC for highspeed high-resolution pipelined ADCs which employs a code-by-code analogue self-calibration technique. Measured results from the prototypes fabricated in a 1.0 /spl mu/m CMOS technology show that the proposed self-calibration technique corrects the MDAC linearity and the interstage gain to the 14-bit level, while allowing conversion rates in the MHz range.
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CiteScore
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