The optimization of GHz integrated CMOS quadrature VCO's based on a poly-phase filter loaded differential oscillator

This paper presents the design trade-offs to implement an integrated CMOS quadrature oscillator based on a differential VCO and a differential-to-quadrature converting poly-phase filter. Both the traditional structure, with cascaded building blocks and the appropriate inter circuit buffers, and the merged version, without buffering, are discussed. In the latest, the excessive power consumption in the intermediate buffers is avoided. It is explained how the effect of the poly-phase filter on the phase noise performance of the VCO, can be taken into account in the design, resulting in an optimal trade-off between the overall power consumption and the phase-noise of the quadrature oscillation generator.