{"title":"10mhz bw50fj /conv。采用基于优化设计方法的高阶单运放积分器的连续时间ΔΣ调制器","authors":"Kazuo Matsukawa, Koji Obata, Y. Mitani, S. Dosho","doi":"10.1109/VLSIC.2012.6243839","DOIUrl":null,"url":null,"abstract":"This paper proposes a new power and area efficient circuit configurations, and also an optimization design method for such configurations. Two types of loopfilters are fabricated, one is a third-order integrator with single opamp for mobile TV-tuners (Modulator A) and the other is a fourth-order (Modulator B) for wide-band mobile receivers. Modulator A and Modulator B are fabricated in 65 nm and 40 nm CMOS processes, respectively. Results show that the new filter with an efficient optimization tool is a very powerful way to develop high efficient ΔΣ.","PeriodicalId":6347,"journal":{"name":"2012 Symposium on VLSI Circuits (VLSIC)","volume":"8 1","pages":"160-161"},"PeriodicalIF":0.0000,"publicationDate":"2012-06-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"36","resultStr":"{\"title\":\"A 10 MHz BW 50 fJ/conv. continuous time ΔΣ modulator with high-order single opamp integrator using optimization-based design method\",\"authors\":\"Kazuo Matsukawa, Koji Obata, Y. Mitani, S. Dosho\",\"doi\":\"10.1109/VLSIC.2012.6243839\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper proposes a new power and area efficient circuit configurations, and also an optimization design method for such configurations. Two types of loopfilters are fabricated, one is a third-order integrator with single opamp for mobile TV-tuners (Modulator A) and the other is a fourth-order (Modulator B) for wide-band mobile receivers. Modulator A and Modulator B are fabricated in 65 nm and 40 nm CMOS processes, respectively. Results show that the new filter with an efficient optimization tool is a very powerful way to develop high efficient ΔΣ.\",\"PeriodicalId\":6347,\"journal\":{\"name\":\"2012 Symposium on VLSI Circuits (VLSIC)\",\"volume\":\"8 1\",\"pages\":\"160-161\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2012-06-13\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"36\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2012 Symposium on VLSI Circuits (VLSIC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSIC.2012.6243839\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 Symposium on VLSI Circuits (VLSIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIC.2012.6243839","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 10 MHz BW 50 fJ/conv. continuous time ΔΣ modulator with high-order single opamp integrator using optimization-based design method
This paper proposes a new power and area efficient circuit configurations, and also an optimization design method for such configurations. Two types of loopfilters are fabricated, one is a third-order integrator with single opamp for mobile TV-tuners (Modulator A) and the other is a fourth-order (Modulator B) for wide-band mobile receivers. Modulator A and Modulator B are fabricated in 65 nm and 40 nm CMOS processes, respectively. Results show that the new filter with an efficient optimization tool is a very powerful way to develop high efficient ΔΣ.
求助内容：
应助结果提醒方式：
京公网安备 11010802042870号
