片上网络中的组播路由方法

M. Prasad, Shirshendu Das, H. Kapoor
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引用次数: 1

摘要

构建当今计算机系统的主要组件是芯片多处理器,其中多个处理器核心被放置在同一芯片上。这些核心可以运行一个应用程序的多个线程,也可以同时运行多个应用程序。这些应用程序的有效执行取决于片上互连以最小开销支持多播的能力。许多现有的工作为一对一和广播通信提供了有效的解决方案,但对于多播通信,它们假设存在片上路由器能力,可以提供多个点对点链路,每个目的地一个。在本文中,我们提出了一种新的片上网络的组播路由方法,它需要最少的硬件支持。我们的方法是根据目标节点的分布密度选择复制点,从而最小化网络中每个副本的平均跳遍历。实验结果表明,在8 × 8网格的情况下,链路利用率和链路功耗降低了8.36%,对于尺寸为12 × 12和16 × 16的网格网络,百分比降低了16%,显示了我们的方法的可扩展性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
An Approach for Multicast Routing in Networks-on-Chip
The main components for building today's computer systems are Chip Multiprocessors, where multiple processor cores are placed on the same chip. These cores can run several threads of an application or can run multiple applications at the same time. Efficient execution of such applications depends on the ability of the on-chip interconnect to support multicast with minimum overhead. Many of the existing works present efficient solutions to one-to-one and broadcast communication but for multicast they assume the existence of on-chip router capability to provide several point-to-point links one for each destination. In this paper we propose a new approach for multicast routing for on-chip networks with minimum hardware support. Our approach minimizes the average hop traversal of each replica within the network by selecting replication points based on the distribution density of the destination nodes. Experimental results have shown that link utilization and link power consumption have been reduced by 8.36% in case of an 8 x 8 mesh and for mesh networks of dimensions 12 x 12 and 16 x 16 the percentage reduction is 16%, showing the scalability of our approach.
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