紧凑的CMOS线性晶体管和四象限模拟乘法器

2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512) Pub Date : 2004-05-23 DOI:10.1109/ISCAS.2004.1328287

M. Panovic, A. Demosthenous

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引用次数: 11

摘要

本文介绍了一种低电压/低功率MOS线性变换器，可配置成平方律函数电路和四象限模拟乘法器。所描述的紧凑的模拟计算单元特别适合并行处理系统。该电路采用0.8 /spl mu/m CMOS工艺制造，并在2v电源下工作。

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Compact CMOS linear transconductor and four-quadrant analogue multiplier

This paper describes a low voltage/low power MOS linear transconductor which can be configured to realize a square-law function circuit and a four quadrant analogue multiplier. The compact analogue computation cells described are particularly suited to parallel processing systems. The circuits were fabricated using a 0.8 /spl mu/m CMOS process and operate from a 2 V power supply.

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来源期刊

2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512)

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