基于门线考虑的3×4二维分布式放大器的有效设计

Q3 Engineering
A. H. Mogheyse, H. M. Naimi
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引用次数: 0

摘要

本文将二维波传播用于分布式放大器漏极节点的功率合并。所提出的二维数据分析使用电漏斗来增加漏极节点的电流。由于栅极线的考虑,提出的结构被修改。总增益的提高是通过对栅极线的特性阻抗进行工程设计,并对增益单元的输出进行适当的改变来实现的。所有的变化都是考虑到输入和输出反射损耗。本文给出了该增益的解析表达式,并讨论了电漏斗的设计考虑。利用台积电0.18 CMOS模型在ADS中模拟了基于二维功率组合的宽带数据采集系统,其功耗为49.42 mw,电源功耗为1.2V。所提出的数模增益与计算值吻合良好。虽然使用了一级数据分析,但最终结果在0.18 CMOS技术下产生了高品质系数(FOM)。最终设计结果显示,从近直流到23.6 GHz的增益为11.1 dB,噪声系数在3 ~ 5.2dB之间,在1dB输出压缩点(OP1dB)的最大输出功率为7.1dBm。doi: 10.5829 / ije.2017.30.06c.02
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Effective Design of a 3×4 Two Dimensional Distributed Amplifier Based on Gate Line Considerations
In this paper two dimensional wave propagation is used for power combining in drain nodes of a distributed amplifier (DA). The proposed two dimensional DA uses an electrical funnel to add the currents of drain nodes. The proposed structure is modified due to gate lines considerations. Total gain improvement is achieved by engineering the characteristic impedance of gate lines and also make appropriate variation in the output of gain cells. All variations are done with respect to input and output reflection loss considerations. Analytical expression for the gain of the proposed DA is presented and design considerations for electrical funnel are discussed. Based on two dimensional power combining a wide band DA is simulated using TSMC 0.18 CMOS model in ADS which consumes 49.42 mw from 1.2V power supply. Good agreement between the proposed DA gain and calculated value is achieved. Although one stage DA is used, the final results yield a high figure of merit (FOM) in 0.18 CMOS technology. The final design shows 11.1 dB gain from near DC to 23.6 GHz, noise figure between 3 to 5.2dB and maximum output power of 7.1dBm at 1-dB output compression point (OP1dB). doi: 10.5829/ije.2017.30.06c.02
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来源期刊
CiteScore
3.10
自引率
0.00%
发文量
29
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