Calculating the probability of timing violation of F/F-controlled paths with timing variations

We propose an analytic method to calculate the probability of timing violation of F/F-controlled paths by considering timing variations. We first characterize the timing characteristics of F/Fs and path delays using a generalized canonical delay model. The probability of setup-time violation is then calculated by considering the correlation between F/Fs and logic paths. For the calculation, we used conditional tightness probability equation which reflects the nonlinearity of the process parameters. In experiments, the proposed method exhibited the error less than 7 % with respect to Monte-Carlo (MC) simulation results. Compared to the benchmark method that does not consider the variations of the timing characteristics of F/Fs, the proposed method improved the accuracy by more than 18% on average.