Viterbi解码器中快速基数2 ACS与自适应快速基数2 ACS的比较

2013 International Conference on Emerging Trends in VLSI, Embedded System, Nano Electronics and Telecommunication System (ICEVENT) Pub Date : 2013-04-11 DOI:10.1109/ICEVENT.2013.6496563

N. Bobby, S. Srivatsa, L. Kishore, A. Rajiv, S. S. Suresh

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引用次数: 10

摘要

自适应维特比解码器用于解码约束长度较长的码，而自适应维特比解码器用于解码约束长度较短的码。为了最大限度地降低功耗和误码率，我们在维特比解码器和自适应维特比解码器中实现了FastRadix 2 ACS。与自适应Viterbi解码器相比，Viterbi解码器的面积消耗更多。但是功率利用率急剧下降到20%，而在维特比解码器中，功率消耗为80%。在我们之前的工作中，我们已经在维特比解码器中实现了自适应快速ACS，自适应Radix2 ACS。但实验结果表明，在Viterbi解码器中，自适应FastRadix 2 ACS比在Viterbi解码器中使用FastRadix 2 ACS功耗更低。

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Comparison of fast radix 2 ACS with adaptive fast radix 2 ACS in Viterbi Decoder

Adaptive Viterbi decoder is used for decoding codes of long constraint length, where as viterbi decoder is used for decoding short constraint lengths. In order to minimize power consumption and BER, we have implemented FastRadix 2 ACS in Viterbi decoder and Adaptive Viterbi decoder. The area consumption was more in Viterbi compared to Adaptive Viterbi decoder. But the power utilization reduced drastically to 20% where as in Viterbi decoder the power consumed was 80%. In our previous work we have implemented Adaptive fast ACS, Adaptive Radix2 acs in Viterbi decoder. But the experimental result proves power consumption is less in Adaptive FastRadix 2 ACS in Viterbi decoder than FastRadix 2 ACS in Viterbi decoder.

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来源期刊

2013 International Conference on Emerging Trends in VLSI, Embedded System, Nano Electronics and Telecommunication System (ICEVENT)

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