A. Boebel, H. Ceslik, Helmut Colbow, M. Dam, S. Díez, I. Gregor, P. Göttlicher, J. Keaveney, Joash Nicholas Naidoo, M. N. van der Merwe, J. Oechsle, S. Schmitt, M. Stanitzki, R. Ström, C. Wanotayaroj, J. Wyngaard
{"title":"ATLAS ITk条探测器首个基于lgbgb的子结构末端卡原型的最新结果","authors":"A. Boebel, H. Ceslik, Helmut Colbow, M. Dam, S. Díez, I. Gregor, P. Göttlicher, J. Keaveney, Joash Nicholas Naidoo, M. N. van der Merwe, J. Oechsle, S. Schmitt, M. Stanitzki, R. Ström, C. Wanotayaroj, J. Wyngaard","doi":"10.1109/NSS/MIC42677.2020.9507943","DOIUrl":null,"url":null,"abstract":"The main building blocks of the ATLAS Inner Tracker (ITk) Strip Detector, to be installed for the High-Luminosity Upgrade of the Large Hadron Collider (HL-LHC), are modules that host sensors and front-end ASICs. Carbon-fibre substructures provide mechanical support to up to 14 modules per side. An End-of-Substructure (EoS) card on each substructure side connects up to 28 differential data lines at 640 Mbit/s from the module to low-powered GigaBit Transceivers (lpGBT) ASICs for data serialisation and uses 10 GBit/s optical links to transmit signals to the off-detector systems via the Versatile Link PLUS (VL+) transceiver module, VTRx+. Prototype EoS cards have been designed and extensively tested using lpGBT and VTRx+ prototypes. The status of the electronics design and recent results of tests of electrical and data processing performance based on these prototypes are presented.","PeriodicalId":6760,"journal":{"name":"2020 IEEE Nuclear Science Symposium and Medical Imaging Conference (NSS/MIC)","volume":"33 1","pages":"1-4"},"PeriodicalIF":0.0000,"publicationDate":"2020-10-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Recent Results from the First lpGBT-based Prototype of the End-of-Substructure Card for the ATLAS ITk Strip Detector\",\"authors\":\"A. Boebel, H. Ceslik, Helmut Colbow, M. Dam, S. Díez, I. Gregor, P. Göttlicher, J. Keaveney, Joash Nicholas Naidoo, M. N. van der Merwe, J. Oechsle, S. Schmitt, M. Stanitzki, R. Ström, C. Wanotayaroj, J. Wyngaard\",\"doi\":\"10.1109/NSS/MIC42677.2020.9507943\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The main building blocks of the ATLAS Inner Tracker (ITk) Strip Detector, to be installed for the High-Luminosity Upgrade of the Large Hadron Collider (HL-LHC), are modules that host sensors and front-end ASICs. Carbon-fibre substructures provide mechanical support to up to 14 modules per side. An End-of-Substructure (EoS) card on each substructure side connects up to 28 differential data lines at 640 Mbit/s from the module to low-powered GigaBit Transceivers (lpGBT) ASICs for data serialisation and uses 10 GBit/s optical links to transmit signals to the off-detector systems via the Versatile Link PLUS (VL+) transceiver module, VTRx+. Prototype EoS cards have been designed and extensively tested using lpGBT and VTRx+ prototypes. The status of the electronics design and recent results of tests of electrical and data processing performance based on these prototypes are presented.\",\"PeriodicalId\":6760,\"journal\":{\"name\":\"2020 IEEE Nuclear Science Symposium and Medical Imaging Conference (NSS/MIC)\",\"volume\":\"33 1\",\"pages\":\"1-4\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2020-10-31\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2020 IEEE Nuclear Science Symposium and Medical Imaging Conference (NSS/MIC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/NSS/MIC42677.2020.9507943\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 IEEE Nuclear Science Symposium and Medical Imaging Conference (NSS/MIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/NSS/MIC42677.2020.9507943","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
摘要
用于大型强子对撞机(HL-LHC)高亮度升级的ATLAS内部跟踪器(ITk)条形探测器的主要组成部分是承载传感器和前端asic的模块。碳纤维子结构为每侧最多14个模块提供机械支撑。每个子结构侧的EoS (end - substructure)卡以640mbit /s的速率将28条差分数据线从模块连接到低功耗千兆收发器(lpGBT) asic，用于数据序列化，并使用10gbit /s光链路将信号通过VL+ (Versatile Link PLUS)收发模块VTRx+传输到检测器外系统。原型EoS卡已经设计并使用lpGBT和VTRx+原型进行了广泛测试。介绍了基于这些样机的电子设计现状以及最近的电气性能和数据处理性能测试结果。
Recent Results from the First lpGBT-based Prototype of the End-of-Substructure Card for the ATLAS ITk Strip Detector
The main building blocks of the ATLAS Inner Tracker (ITk) Strip Detector, to be installed for the High-Luminosity Upgrade of the Large Hadron Collider (HL-LHC), are modules that host sensors and front-end ASICs. Carbon-fibre substructures provide mechanical support to up to 14 modules per side. An End-of-Substructure (EoS) card on each substructure side connects up to 28 differential data lines at 640 Mbit/s from the module to low-powered GigaBit Transceivers (lpGBT) ASICs for data serialisation and uses 10 GBit/s optical links to transmit signals to the off-detector systems via the Versatile Link PLUS (VL+) transceiver module, VTRx+. Prototype EoS cards have been designed and extensively tested using lpGBT and VTRx+ prototypes. The status of the electronics design and recent results of tests of electrical and data processing performance based on these prototypes are presented.
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