数字电路中emi引起的延迟:预测

J. Laurin, S. Zaky, K. Balmain
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引用次数: 9

摘要

介绍了一个简单的模型来预测低电平射频干扰对逻辑逆变器传输延迟的影响。延迟的变化是作为感应电压扰动的函数来计算的,而感应电压扰动又可以通过线性频域分析从入射场中计算出来。该模型考虑了RFI信号的相位和幅度以及逻辑转换的摆率对诱导延迟的依赖性。其预测结果与实验结果和Spice模拟的干扰频率(最大开关频率)(带内干扰)非常吻合。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
EMI-induced Delays In Digital Circuits: Prediction
A simple model is introduced to predict the changes in propagation delay in a logic inverter caused by low-level radio frequency interference. The change in delay is computed as a function of the induced voltage disturbance, which in turn can be computed from the incident field using linear frequency domain analysis. The model accounts for the dependence of the induced delay on the phase and amplitude of the RFI signal as well as on the slew rate of the logic transitions. Its predictions are shown to be in good agreement with experimental results and Spice simulations for interference frequencies up to the maximum switching frequency of the inverter (in-band interference).
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CiteScore
0.30
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